OA0_COMPINT=DISABLE, OA0_PWR_MODE=OFF
Opamp0 and resistor0 control
OA0_PWR_MODE | Opamp0 power level, assumes Cload=15pF for the (internal only) 1x driver or 50pF for the (external) 10x driver 0 (OFF): Off 1 (LOW): Low power mode (IDD: 350uA, GBW: 1MHz for both 1x/10x) 2 (MEDIUM): Medium power mode (IDD: 600uA, GBW: 3MHz for 1x & 2.5MHz for 10x) 3 (HIGH): High power mode for highest GBW (IDD: 1500uA, GBW: 8MHz for 1x & 6MHz for 10x) 4 (RSVD): N/A 5 (PS_LOW): Power Saver Low power mode (IDD: ~20uA with 1uA bias from AREF, GBW: ~100kHz for 1x/10x, offset correcting IDAC is disabled) 6 (PS_MEDIUM): Power Saver Medium power mode (IDD: ~40uA with 1uA bias from AREF, GBW: ~100kHz for 1x/10x, offset correcting IDAC is enabled) 7 (PS_HIGH): Power Saver Medium power mode (IDD: ~60uA with 1uA bias from AREF, GBW: ~200kHz for 1x/10x, offset correcting IDAC is enabled) |
OA0_DRIVE_STR_SEL | Opamp0 output strength select 0=1x, 1=10x This setting sets specific requirements for OA0_BOOST_EN and OA0_COMP_TRIM |
OA0_COMP_EN | Opamp0 comparator enable |
OA0_HYST_EN | Opamp0 hysteresis enable (10mV) |
OA0_BYPASS_DSI_SYNC | Opamp0 bypass comparator output synchronization for DSI (trigger) output: 0=synchronize (level or pulse), 1=bypass (output async) |
OA0_DSI_LEVEL | Opamp0 comparator DSI (trigger) out level : 0=pulse, each time an edge is detected (see OA0_COMPINT) a pulse is sent out on DSI 1=level, DSI output is a synchronized version of the comparator output |
OA0_COMPINT | Opamp0 comparator edge detect for interrupt and pulse mode of DSI (trigger) 0 (DISABLE): Disabled, no interrupts will be detected 1 (RISING): Rising edge 2 (FALLING): Falling edge 3 (BOTH): Both rising and falling edges |
OA0_PUMP_EN | Opamp0 pump enable |
OA0_BOOST_EN | Opamp0 gain booster enable for class A output, for risk mitigation only, not user selectable. Value depends on the drive strength setting - 1x mode: set to 1; 10x mode: set to 0 |